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LTC4222
9
4222fb
SCL: Serial Bus Clock Input. Data at the SDA pin is shifted 
in or out on rising edges of SCL. This is a high impedance
pin that is generally driven by an open-collector output
from a master controller. An external pull-up resistor or
current source is required.
SDAO: (SSOP Package) Serial Bus Data Output. Open-
drain output for sending data back to the master control-
ler or acknowledging a write operation. Normally tied to
SDAI to form the SDA line. An external pull-up resistor
or current source is required. Internally tied to SDAI in
QFN package.
SDAI: (SSOP Package) Serial Bus Data Input. A high im-
pedance input for shifting in address, command or data
bits. Normally tied to SDAO to form the SDA line. Internally
tied to SDAO in QFN package.
SDA: (QFN Package) Serial Bus Data Input/Output Line. 
Formed by internally tying the SDAO and SDAI lines
together. An external pull-up resistor or current source
is required.
SENSE1

, SENSE2

: Negative Current Sense Input. Con-
nect this pin to the output of the current sense resistor. The
current limit circuit controls the corresponding GATE pin
voltage to limit the sense voltage between the SENSE
+
 and
SENSE

 pins to the level set by the soft-start and foldback
characteristic, with a maximum of 50mV during start-up
and to 150mV independent of soft-start and foldback after
the start-up timer has expired. A circuit breaker, enabled
after start-up, trips when the sense voltage exceeds 50mV
for 20祍.
SENSE1
+
, SENSE2
+
: (SSOP Package) Positive Current 
Sense Input. Connect this pin to the input of the current
sense resistor. It must be connected to the same trace as
V
DDn
. Internally tied to V
DDn
 in the QFN package.
SOURCE1, SOURCE2: N-Channel MOSFET Source and 
ADC Input. Connect this pin to the source of the external
N-channel MOSFET switch for gate drive return. This pin
also serves as the ADC input to monitor output voltage.
The pin provides a return for the gate pull-down circuit.
SS: Soft-Start Input. Sets the inrush current slew rate at 
start-up. Connect a 68nF capacitor to provide 5mV/ms as
the slew rate for the sense voltage in start-up. This cor-
responds to 1A/ms with a 5m?sense resistor. Note that
a large soft-start capacitor and a small TIMER capacitor
may result in a condition where the timer expires before
the inrush current has started. Allow an additional 2nF of
timer capacitance per 1nF of soft-start capacitor to ensure
proper start-up.
TIMER: Start-Up Timer Input. Connect a capacitor be-
tween this pin and ground to set a 12.3ms/礔 duration
for start-up, after which an overcurrent fault is logged if
the inrush is still current limited. The duration of the off
time is 600ms/礔 when overcurrent auto-retry is enabled,
resulting in a 1:50 duty cycle. An internal timer provides
a 100ms start-up time and 5 second auto-retry time if
this pin is tied to INTV
CC
. Allow an additional 2nF of timer
capacitance per 1nF of soft-start (SS) capacitor to ensure
proper start-up.
UV1, UV2: Undervoltage Comparator Input. Connect this 
pin to an external resistive divider from V
DD
. If the volt-
age at this pin falls below 1.145V , an undervoltage fault
is detected and the GATE turns off. Pulling this pin below
0.4V resets the fault register for that channel except for
the UV fault bit. Tie to INTV
CC
 if unused.
V
DD1
, V
DD2
: Supply Voltage Input and Positive Current 
Sense Input. This pin has an undervoltage lockout threshold
of 2.43V . In the QFN package this pin is also the positive
current sense input.
PIN FUNCTIONS
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